PGC, which was established in 1991, is dedicated in providing SoC design service and production turnkey service (SoC / IP / ASIC Design Turnkey Service). PGC's commitment is to provide the best quality of ASIC and after-selling service to customers who can achieve the best time to market, the most competitive price, and the most competitive position in the market.

PGC has already set up the complete SoC design service environment to enhance the competitive advantage in SoC design service. PGC also built up the capability of RTL QA service. Moreover, PGC is also aggressively to build up the IP intellectual bank based on potential application platforms. PGC is expecting to provide the best SoC solution to customers. Based on the excellent experience of more than 750 successful projects, PGC can help customer to achieve the best competitive advantage in the market, and create the win-win strategy for each other.

	Business Items
	SoC / ASIC Design Turnkey Service SoC Implementation Platform Service: RTLQA, STA, Signal Integrity, LAYOUT, Low Power Design, DFT, ATPG, BSD, Mem_BIST, Power dissipation (RTL, Netlist, Package) IP (Authorizing, Modify, Customized) Service GATE ARRAY (Emb_G/A) Design Turnkey Service LAYOUT (APR, Fully, Merge) Design Service COT (GDSII TO CHIP) Turnkey Service MPW (Multi-Project Wafer) Shuttle Bus Service SoC / ASIC Testing Program Development: Agilent 93000, HILEVEL SoC / ASIC Product Turnkey Service (PGC + TSMC + ASE): Logistic, WIP, Tape-out, Package, Testing, Yield Improvement, Failure Analysis, Reliability, Wafer Allocatio

IP Portfolio

SoC/ASIC Design Turnkey Portfolio   One-stop-shopping design turnkey service of RTL-to-Chips (0.13um~0.6um) Platform-base design turnkey service (ARM, USB, 8051, PCI...etc) RTL QA Analysis option DFT & ATPG & Memory BIST design service option Low Power design service option Signal Integrity design service option Reliability Test service options Test program development and Agilent 93K testing option

Gate Array (GA) design turnkey service   GA design Embedded GA design Customized GA FPGA to GA conversion Third party GA conversion

MPW Service   SoC /ASIC design turnkey service consolidates TSMC's Cybershuttle , MOSIS , CIC and PGC own MPW service.

Layout Service   SoC /ASIC automatic place and route (APR) service and consulting Hierarchical and multi-million gates Gate level floorplan Timing driven/ Power driven/ CTS (Clock Tree Synthesis) APR. Signal integrity design-(antenna/cross talk/voltage drop/electron-migration) violation analysis and removal. Physical verification of LVS/DRC/ERC Scan chain re-ordering Advanced 3D gate level and transistor level RC extraction SDF generate and skew report ECO (Engineering Change Order) service FIB (Focus Ion Beam) service and consulting

COT Service   GDSII-to-Chip tape out turnkey service Fab-Package-Test production turnkey service

Comprehensive IP Service Portfolios   Digital IP 8051, 8052, 16-bits MCU, UART, PCI, JPEG, USB1.1, USB2.0, etc... Mix Mode IP ADC IP (0.18um~0.35um) DAC IP (0.18um~0.35um) PLL IP (0.18um~0.5um) Special IO IP I2C, 10/100 MAC, 1394a IO, LVDS, PECL, SSTL-2, HSTC, PCI-X, 32K Crystal Oscillator I/O, etc... Memory IP Embedded Memory IP (0.18um~0.25um SRAM, 0.18um 1T-SRAM) High Density Memory IP (0.18~0.25um SRAM, 0.18um SROM) Embedded Flash Memory IP (0.25um~0.5um)